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Electronics
Semiconductor Division
RC5033
Adjustable Synchronous DC-DC Converter
Features
* * * * * * * * * * >85% Efficiency 350uA quiescent current in shutdown Fast transient response Soft control power-up Over-Voltage Protection Output voltage range from 2.0V to 3.6V Factory trimmed low TC reference voltage Adjustable oscillator frequency Drives N-Channel MOSFETs 16 pin SOIC package
Applications
* 3.3V power supply for PentiumTM based CPU motherboards * 3.45V power supply for AMD-K5TM CPU * 2.5V or 3.6V power supply for PowerPCTM
Preliminary Information
Description
The RC5033 is a synchronous mode DC-DC controller IC dedicated to providing a 5V to 2.0V up to 3.6V conversion for various types of CPU power . It can be configured in both the synchronous and non-synchronous modes and with the proper applications circuitry can be used to deliver load current greater than 10 Amps. The RC5033 is designed to operate in a standard PWM control mode under heavy load conditions and as a PFM controller in light load conditions. Its highly accurate low TC reference eliminates the need for precision external components in order to achieve tight tolerance voltage regulation. Through the use of external resistors, the RC5033 can generate accurate output voltages from 2.0V up to 3.6V. An integrated Over-Voltage protection function constantly monitors the output voltage and shuts down the power to the CPU in the event of a out-oftolerance voltage situation, thereby protecting the CPU. The programmable oscillator can operate from 200KHz to greater than 1MHz to provide for flexibility in choosing external components such as inductors, capacitors, and Power MOSFETs.
Block Diagram
OSC
+ - I + - I - + + - + - + I + - +
VIN
VO
I
-
-
DIGITAL CONTROL
VREF
VREF
65-5033-01
Rev. 0.9.5
PRELIMINARY INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals and limited characterization. They may change without notice. Contact Raytheon for current information.
PRODUCT SPECIFICATION
RC5033
Pin Assignments
ON/OFF IFB VFB VCCA VCCD VCCP LODRV GNDP
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
65-5033-02
CEXT GNDA ADJ3 GNDD ADJ2 ADJ1 VCCQP HIDRV
Pin Definitions
Preliminary Information
Pin Name On/Off IFB VFB VCCA VCCD VCCP LODRV GNDP HIDRV VCCQP ADJ1 ADJ2 GNDD ADJ3 GNDA CEXT
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Current Feedback Input. Voltage Feedback Input. Analog VCC. Digital VCC.
Pin Function Description A low level on this pin will power down; tie to VCCD if not used.
VCC for synchronous FET output drivers. Synchronous FET driver output. Power ground for high current drivers. High side FET driver output. VCC for High side FET output driver VREF adjust pin.1 VREF adjust pin.1 Digital ground. VREF adjust pin.1 Analog ground. External capacitor for setting oscillator frequency.
Note: 1. See voltage adjust table for function
Output Voltage Selection Table
VOUT 3.5V 3.35V 3.3V 2.9V1 2.5V1 2.0V
1
ADJ1 N/C N/C
2
ADJ2 N/C
2
ADJ3 N/C
2 2
N/C N/C N/C N/C
3.9K 2K 39
N/C N/C N/C
Note: 1. See Figure 3 for resistor connection. 2. Indicated short pins together.
2
RC5033
PRODUCT SPECIFICATION
Absolute Maximum Ratings
(beyond which the device may be damaged)1 Parameter VCCP VCCQP TJ TA TS TL Driver Voltage High Driver Supply Junction Temperature Ambient Operating Temperature Storage Temperature Lead Soldering Temperature (10 seconds) 0 -65 Conditions Min Typ Max 13 13 175 70 150 300 Units V V C C C C
Note: 1. Functional operation under any of these conditions is NOT implied.
Preliminary Information
Operating Conditions
Parameter VCC VCCP VCCQP VIH VIL Supply Voltage Low Driver Supply High Driver Supply Input Voltage, Logic HIGH Input Voltage, Logic LOW Conditions Min 4.5 4.5 9 2 0.8 Typ 5 5 Max 7 12 13 Units V V V V V
DC Electrical Characteristics
(VCC = 5V, fosc = 650 KHz, and TA = +25C unless otherwise noted) Parameter VO IO Vref Acc VTC LDR LIR VR Cum Acc Eff Iodr PD Output Voltage Output Current Voltage Reference Accuracy Output Voltage Tempco Load Regulation Line Regulation Output Voltage Ripple Cumulative Accuracy Efficiency Output Driver I Power Dissipation
2
Conditions Nominal, Pin 12 conn. Pin 14, TA = 0-70C See Figure for application
Min 3.135
Typ 3.3 5 1 -40
Max 3.465
Units V A % ppm %Vo %Vo mV % % A
0.5 to 7A VCC = 5% TA = 0-70C Synchronous mode > 1A Open Loop 80 0.5
1 0.14 30 3 85 0.7 0.1 0.2
W
Notes: 1. Functional operation under any of these conditions is not implied. Performance is guaranteed only if Operating Conditions are not exceeded. 2. Output Voltage accuracy, Tempco, load regulation, ripple, and transient performance determine the Cumulative Accuracy.
3
PRODUCT SPECIFICATION
RC5033
AC Electrical Characteristics1
(TA = +25C unless otherwise noted) Parameter Tr Fosc Osc Acc Dtc Dtcm Imax Iscp Ovp Response Time Oscillator Range Fosc Accuracy Max Duty Cycle Min Duty Cycle Imax Threshold Short Circuit Prot Over Voltage Prot Response to Imax Soft start response PWM mode PFM mode 30 80 20 15 10 30 90 Conditions Il=0.5A to 5.5A 0.2 10 95 100 Min Typ 10 1.2 Max Units s MHz % % ns mV mV %Vo ns s
Preliminary Information
Trimax Tssp
Note: 1. Guaranteed by design, not 100% total.
4
RC5033
PRODUCT SPECIFICATION
Typical Operating Characteristics1
Load Regulation (FOSC = 400 KHz) Efficiency vs Output Current (FOSC = 400 KHz)
100 3.38 3.37 3.36 3.35
Efficiency (%)
90 80 70 60 50 0 2 4 6
VOUT
3.34 3.33 3.32 3.31 3.3 0 2 4 6 8
Output Current (A) Output Current (A) Load Regulation (FOSC = 650 KHz) Efficiency vs Output Current (FOSC = 650 KHz)
100 3.37 3.36 3.35
Preliminary Information
Efficiency (%)
90
VOUT
80 70 60 50 0 2 4 6
3.34 3.33 3.32 3.31 3.3 0 2 4 6 8
Output Current (A)
Output Current (A)
Load Regulation (FOSC = 1 MHz) Efficiency vs Output Current (FOSC = 1 MHz)
100 3.36 3.35 3.34
Efficiency (%)
90
VOUT
0 2 4 6
80 70 60 50
3.33 3.32 3.31 3.3 0 2 4 6 8
65-5033-03
Output Current (A) Note: 1. Data taken with circuit of Figure 1.
Output Current (A)
5
PRODUCT SPECIFICATION
RC5033
Typical Operating Characteristics (continued)
Line Regulation vs. Output Load (FOSC = 400 KHz)
0.3 3.5 3.495
Reference Tempco
Line Reg (%)
0.25 0.2 0.15 0.1 0.05 0 0 2 4 6 8
VREF
3.49 3.485 3.48 3.475 3.47 0 50 100
Preliminary Information
Output Current (A)
Temp
Line Regulation vs. Output Load (FOSC = 650 KHz)
0.3
CEXT vs. Oscillator Frequency
200
Line Reg (%)
0.25 0.2 0.15 0.1 0.05 0 0 2 4 6 8
CEXT (pF)
150 100 50 0 0 4 4 8
Output Current (A)
Frequency (Hz)
Line Regulation vs. Output Load (FOSC = 1 MHz)
0.25 0.2
Line Reg (%)
0.15 0.1 0.05 0 -0.05 -0.1 0 2 4 6 8
65-5033-04
Output Current (A)
6
RC5033
PRODUCT SPECIFICATION
Typical Operating Characteristics (continued)
VOUT (50mV/division) VOUT (50mV/division) Hidrv (5V/division)
Hidrv (5V/division)
Preliminary Information
TIME ( 1s/division)
TIME ( 1s/division)
AC Ripple response .2A Load
AC Ripple response 5A Load
VOUT (50mV/division)
IOUT (2A/division)
TIME ( 200s/division)
IOUT (2A/division)
VOUT (50mV/division)
TIME ( 20s/division)
Transient Response .2A to 5A Load
Transient Response Magnified
VCC C5 200F C4 0.1F DS2 EC10QS02 M1 MTD20N03HDL 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 C2 1F L1 1.5H R1 0.012 VO C9 330F
RC5033
GND
M2 MTD20N03HDL
DS1 MBRB1545CT
C1 47pF
C13 4.7F
65-5033-05
Figure 1. Standard 7A Application Schematic
7
PRODUCT SPECIFICATION
RC5033
VCC C5 200F C4 0.1F DS2 EC10QS02 M1 MTD20N03HDL 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 C2 1F L1 R1 CDRH127-1R3NC 0.012 VO C9 330F
RC5033
DS1 MBRB1545CT
GND
Preliminary Information
C1 47pF
C13 4.7F
65-5033-06
Figure 2. Non-Synchronous 7A Application Circuit
VCC C5 200F C4 0.1F DS2 EC10QS02 M1 MTD20N03HDL 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 C2 1F L1 1.5H R1 0.012 VO C9 330F
RC5033
R2 GND
M2 MTD20N03HDL
DS1 MBRB1545CT
C1 47pF
C13 4.7F
65-5033-07
Figure 3. Adjustable Voltage DC-DC Converter
8
RC5033
PRODUCT SPECIFICATION
RC5033 Standard Application Circuit Bill of Materials Ref Designator L1 M1,M2 DS1 DS2 R1 C5 C9 C2 C1 C4 Quantity 1 2 1 1 1 1 1 1 1 2 Part No. CDRH127-1R3NC MTD20N03HDL MBRB1545CT EC10QS02L LRC-2512 OS-CON 10SA220M OS-CON 10SA330M 1uF 47pF 0.1uF
Table 1. Components for RC5033
Manufacturer Sumida Motorola Motorola Nihon IRC Sanyo Sanyo Monolithic ceramic Cap SMD Cap
Preliminary Information
SMD Cap
RC5033 Alternate Suppliers of Components Ref Designator L1 M1,M2 Quantity 1 2 Alternate Part No. PE-53680 2SK1388 IRLZ44N Si4410DY DS1 DS2 R1 C5 C9 1 1 1 1 1
Table 2. Alternate Components Selection
Alternate Manufacturer Pulse Engineering Fuji International Rectifier Temic (Siliconix) Nihon Rectron Motorola DALE
C10T02QL SR1620C MBRS140T3 WSL-2512
9
PRODUCT SPECIFICATION
RC5033
Applications Discussion
VCCP C5 200F C4 0.1F DS2 EC10QS02 M1 MTD20N03HDL 9 +12V 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 C2 1F L1 1.5H R1 0.012 VO C9 330F
RC5033
DS1 MBRB1545CT
GND
Preliminary Information
C1 47pF
C13 4.7F C1 47pF
R2 12K
- +
+ -
LM308A M2 MTD20N03HDL VO2 2.9V
R3 88K
65-5033-08
Dual Power Supply Application
In some CPU power applications there may be a need for a split voltage converter. The circuit in Figure 4 addresses this need with only minimal component count. The basic RC5033 non-synchronous DC-DC converter is augmented with an op-amp, a power MOSFET, and some 1% resistors to provide a dual power supply with one voltage set to 3.3V and the other, slaved off of the 3.3V, set to 2.9V. In this configuration, the RC5033 converts the 5V to 3..3V with high efficiency. By using the op-amp, power FET, and the resistors, a low-dropout linear regulator is realized that can be run off of the 3.3V. The 2.9V linear regulator has a relatively high efficiency just due to the fact that the ratio of 2.9V/3.3V is close to 88%. The power FET is a low Rdson n-channel MOSFET, and thus it is reasonably inexpensive. The opamp can be a garden variety, though the input bias current and output slew rate need to be considered to optimize accuracy and transient response. The overall efficiency of this power supply system will very much depend upon the percentage of power used on each power output. Overall, the efficiency of this system will be lower than if both supplies were implemented as switchers; however, the added savings of the part count reduction may more than compensate for the overall lower efficiency.
Standard Application Circuit
The circuit shown in Figure 1 along with its components and values has been designed as representative of the typical application involving the RC5033 for a PentiumTM CPU. Use of the standard application circuit will deliver the performance curves shown under the Typical Operating Characteristics section of the data sheet. Many users will want to develop their own DC-DC converter solution that is uniquely tailored to a specific application requirement. In that case, the users should review the detailed information in the Design Procedure and Applications Information section of the data sheet.
Detailed Description
The RC5033 is a programmable voltage synchronous controller. When designed around the appropriate external components, it can be configured to deliver more than 10A of output current. During heavy loading conditions the RC5033 functions as a current-mode PWM step down regulator. Under light loading conditions, the regulator functions in the PFM or pulse skipping mode, thereby increasing its efficiency under light loads.
10
RC5033
PRODUCT SPECIFICATION
Main Control Loop
Internal Reference
The main control loop of the regulator (see Block Diagram) contains two main blocks, the analog control block and the digital control block. The analog control block consists of signal conditioning amplifiers that feed into a set of fast comparators which provide the inputs to the digital control block. The signal conditioning block takes inputs from the IFB(current feedback) and VFB(voltage feedback) pins and then sets up two controlling signal paths. The voltage control path gains up the VFB signal and presents that signal to one of the summing amplifier inputs. The current control path takes the difference between the IFB and VFB pins and presents that signal to another input of the summing amplifier. These two signals are then summed together with the slope compensation input from the oscillator and the output is then presented to a comparator. This comparator provides the main PWM control signal to the digital control block. There are three other comparators in the analog control block. The first two control the thresholds of where the RC5033 goes into its pulse skipping mode during light loads and the second controls the point at which the max current comparator disables the output drive signal to the upper power MOSFET. The third comparator determines when the synchronous mode bottom side power MOSFET will be enabled and disabled. The digital controller section is designed to take the comparator inputs along with the main clock signal from the oscillator and provide the appropriate pulses to the HIDRV and LODRV output pins that will in turn control the external power MOSFETs. This digital section was designed in high speed schottky transistor logic which allows the RC5033 to clock up to speeds greater then 1MHz. This section is responsible for providing the break-before-make timing that ensures that both external FETs will not be on at the same time.
High Current Output Drivers
The reference in the RC5033 is a precision band-gap type reference. Its temperature coefficient is trimmed to provide a near zero TC. For applications that require a voltage other than the voltages provided by the fixed jumper connections, an external resistor will change the reference voltage from 2.0V up to 3.6V. For a guaranteed stable operation under all loading conditions, a 0.1F capacitor is recommended on the VREF output pin.
Over -Voltage Protection
The RC5033 provides a constant monitor of the output voltage for over-voltage protection. Should the voltage at the VFB pin exceed 20% of the selected program voltage, then an overvoltage condition will be assumed to exist and the RC5033 will shut down the output drive signals to the power FETs.
Oscillator
Preliminary Information
The RC5033 oscillator is designed as a fixed current capacitor charging oscillator. An external capacitor allows for maximum flexibility in choosing the associated external components for the RC5033. The oscillator frequency con be set from less than 200KHz to over 1MHz depending on the application requirements.
Design Procedure and Applications Information
Simple Step-Down Converter
The RC5033 contains two identical high current output drivers. These drivers contain high speed bipolar transistors configured in a push-pull configuration. Each output driver is capable of pumping out 1A of current in less than 100ns. Each driver's power and ground are separated from the overall chip power and ground for added switching noise immunity. The HIDRV driver has a power supply, VCCQP, which can be either derived from an external voltage source or can be boot-strapped from a flying-capacitor as is shown in Figure 1. In the boot-strapped mode, C2 is alternately charged from VCC via the schottky diode DS2 and then boosted up when M1 is turned on. This provides a VCCQP voltage equal to 2*VCC - Vds(DS2); or about 9.5V with VCC=5V. This voltage is sufficient to provide the 9V gate drive to the external MOSFET that will be needed for achieving a low Rdson. Since the low side synchronous FET is referenced to ground, there is no need to boost the gate drive voltage and its VCCP power pin can just be tied to VCC.
Figure 4 shows a step-down DC-to-DC Converter with no feedback controller. The derivation of the basic step-down converter will serve as a basis for the design equations for the RC5033 in Figure 1. In Figure 5, the basic operation begins by closing the switch, S1. When S1 is closed the input voltage VB is impressed across the inductor L1. The current flowing in the inductor is given by the following equation: IL=(VB- Vo)Ton/L; where Ton is the time duration for S1 to be closed. When S1 is open, the diode will conduct the inductor current and the output current will be delivered to the load according to the equation: IL=Vo(T - Ton)/L; where T- Ton is the time duration for S1 to be off. By solving these two equations we can arrive at the basic relationship for the output voltage of a step-down converter: Vo= VB(Ton/T).
S1 L1 +
2
Vb
1
1
1
D1
2
C1
2
RL Vout -
65-5033-09
Figure 5. Simple Buck DC-DC Converter
11
PRODUCT SPECIFICATION
RC5033
Selecting the Inductor
Preliminary Information
The inductor is one of the most critical components to be selected in the DC-to-DC converter application. The critical parameters are inductance (L), max DC current (Imax), and the coil resistance (Rl). The inductor core material is a critical factor in determining the amount of current that the inductor will be able to handle. As with all engineering designs there are trade- offs for various types of inductor core materials. In general, Ferrites are popular because of their low cost, low EMI, and high frequency (>500kHz) characteristics. Molypermalloy powder (MPP) materials have good saturation characteristics and low EMI with low hysteresis losses; however they tend to be expensive and are more efficiently utilized at frequencies below 400kHz. DC winding resistance is another critical parameter. In general, the DC resistance should be kept as low as possible. The power loss in the DC resistance will degrade the efficiency of the converter by the relationship: Power Loss = (Io)2*Rl. The value of the inductor is a function of the switching frequency (Ton) and the maximum inductor current. The max inductor current can be calculated from the relationship:
2I L I MAX = --------------------------------------------------------------V IN - V OUT ------------------------------ + 1 F O T ON V OUT - V D
Since the value of the sense resistor is generally in the miliohm region, care should be taken in the layout of the PCB. Trace resistance can contribute significant errors. The traces to the IFB and VFB pins of the RC5033 should be Kelvin connected to the pads of the current-sense resistor as shown in the sample layout Figure 5. To minimize the influence of noise the two traces should be run next to each other and the pins should be bypassed with a .1uF to GND as close to the device pins as possible.
Filter Capacitors
Good ripple performance and transient response are functions of the filter capacitors. Since the 5V input for a PC motherboard can be located several inches away from the DC-to-DC converter, input capacitance can play an important role in the load transient response of the RC5033. In general, the higher the input capacitance, the more charge storage is available for improving the current transfer through the top-side FET. A good rule of thumb is that for each watt of output power that you wish to deliver, there should be around 10uF of input capacitance. Low "ESR" capacitors are best suited for this application and can have an influence on the converter's efficiency. The input capacitor should be placed as close to the drain of the top-side FET as possible to reduce the effect of ringing that can be caused by large trace lengths. The ESR rating of a capacitor is a difficult number to pin down. ESR or Equivalent Series Resistance, is defined at the resonant impedance of that capacitor. Since the capacitor is actually a complex impedance device having resistance, inductance and capacitance, it is quite natural for it to have an associated resonant frequency. As a rule, the lower the ESR, the better suited the capacitor is for use in switching power supply applications. Many capacitor manufacturers do not supply ESR data. A useful estimate of the ESR can be obtained with the following equation: ESR = Pd/2pfC. Where Pd is the capacitor's dissipation factor and f is the frequency of measure and C is the capacitance in farads. With this in mind, calculating the output capacitance correctly is crucial to the performance of the DC-to-DC converter. The output capacitor determines the overall loop stability, output voltage ripple, and the transient load response. The calculation uses the following equation:
( V IN - V OUT )I MAX T ON ------------------------------------------------- + IL V OUT C ( F ) = ----------------------------------------------------------------------------Vr
Where: Fo is the desired clock frequency Ton is the max on time of the M1 FET Vd is the forward voltage of the schottky diode D1 Then the inductor value can be calculated with the relationship:
V IN - V DSON L = --------------------------------- ( T ON ) I MAX
Where: Vdson is the voltage across the drain-source of the M1 FET when switched on. (this can be calculated by RDSon * Imax)
Current-Sense Resistor
The current sense resistor will carry all of the peak current of the inductor. This current will be more than the designed for load current. The RC5033 will begin to limit the output current to the load by turning off the top-side FET driver when the voltage across the current-sense resistor exceeds 100mV. When this happens the output voltage will temporarily go out of regulation. As the voltage across the resistor becomes larger, the top-side FET will turn off more and more until the current limit value is reached and then the RC5033 will continuously deliver the limit current at a reduced output voltage level. To insure that load transient conditions do not momentarily cause deregulation of the output voltage, a 20% margin in the limit voltage is advisable. Thus the resistor should be set by the relationship: R = 100 mV/ Ipeak Where: Ipeak = Imax * 1.33 12
Where: Vr is the desired output ripple voltage
Schottky Diode Selection
The application circuit diagram shows two schottky diodes, DS1 and DS2. DS1 is used in parallel of M2 in order to prevent the lossy body diode in the FET from turning on. DS2 serves a dual purpose. As it is configured, it allows the VCCQP supply pin of the RC5033 to be bootstrapped up to
RC5033
PRODUCT SPECIFICATION
9V by using the bootstrap capacitor C2. When the lower FET M2 is turned on, one side of the capacitor C2 is connected to GND while the other side of the cap is being charged up through D2 to a voltage that is Vin - Vd. When the lower FET turns off and the upper one turns on, the voltage that is supplied to the VCCQP pin is 2Vin - Vd. The voltage then that is applied to the gate of the FET is VCCQP - Vsat, typically around 9V. It is important in the selection of DS1 and DS2 that they have a low forward voltage drop as this directly affects the regulator efficiency. The other job that DS2 performs is that of bootstrapping VCCQP during startup. It is possible to cause the output stage to latchup if the VCCQP supply is brought up before the other VCC supplies of the RC5033. It is therefore advisable that DS2 be connected even in applications that do not utilize the bootstrapping technique for VCCQP. An alternate application could tie the VCCQP supply pin to the +12V power supply in the PC, thus eliminating the need for C2 and forcing the Rdson of M1 even lower by increasing its Vgs.
MOSFET Switches
the FET is going to lower the overall efficiency. In higher current applications, the upper FET can be paralleled to provide greater current capability; however, the lower FET doesn't necessarily have to be doubled since it is on only a fraction of the time that the upper FET is on.
PCB Layout and Grounding
As is the case with most analog circuitry, good layout practices are necessary to achieve the optimum in the overall performance of the DC-to-DC converter. In general, it is always a good practice to have a tight layout that attempts to minimize short low inductance wiring to the RC5033. The use of multilayer PCB is recommended. In particular, it is recommended to have a continuos ground plane beneath the circuit, 2oz copper would be preferred in high current applications. As was stated previously, the current-sense resistor, R1, should be located as close to the RC5033 as possible and the IFB and VFB traces should be Kelvin connected to the pads of R1. To minimize switching losses and noise, place M1, M2, L and DS2 as close together as possible. Also try to keep the HIDRV and LODRV gate drive signal traces as short as possible. It is recommended that the noisy switching part of the circuit be kept away from the low current pins on the chip such as IFB, VFB, ADJ3, ADJ1, and CEXT. Keep the 0.1uF bypass capacitors as close to the chip pins as possible. All of the ground pins should be connected to the ground plane directly under the chip. A sample layout is provided in Figure 6.
Preliminary Information
The MOSFET switches in the RC5033 applications circuit are N-channel "logic-level" FETs. This means that they will be fully on with a Vgs of 4V. Many manufacturers make logic-level FETs and the trick is to choose the one with the lowest RDSon at the given Imax current level. The value of RDSon directly enters into the efficiency equation as a power loss. Also influencing the efficiency is the gate charge of the FET and the clock frequency of the RC5033. At higher clocking rates the amount of charge needed to be delivered to
13
PRODUCT SPECIFICATION
RC5033
Preliminary Information
Figure 6. Sample PCB Layout
14
RC5033
PRODUCT SPECIFICATION
Mechanical Dimensions - 16-Lead SOIC Package
Symbol A A1 B C D E e H h L N ccc Inches Min. Max. Millimeters Min. Max. Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals.
.093 .104 .004 .012 .013 .020 .009 .013 .398 .413 .291 .299 .050 BSC .394 .010 .016 16 0 -- 8 .004 .419 .020 .050
2.35 2.65 0.10 0.30 0.33 0.51 0.23 0.32 10.10 10.50 7.40 7.60 1.27 BSC 10.00 0.25 0.40 16 0 -- 8 0.10 10.65 0.51 1.27
3 6
Preliminary Information
16
9
E
H
1
8
D A e B A1 SEATING PLANE -C- LEAD COPLANARITY ccc C
h x 45 C
L
15

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